Data processing systems, such as a System-on-a-Chip (SoC) may contain multiple processor cores, multiple data caches and shared data resources. In a shared memory system for example, each of the processor cores may read and write to a single shared address space. Cache coherency is an issue in any system that contains one or more caches and more than one device sharing data in a single cached area. There are two potential problems with system that contains caches. Firstly, memory may be updated (by another device) after a cached device has taken a copy. At this point, the data within the cache is out-of-date or invalid and no longer contains the most up-to-date data. Secondly, systems that contain write-back caches must deal with the case where the device writes to the local cached copy at which point the memory no longer contains the most up-to-date data. A second device reading memory will see out-of-date (stale) data.
Snoop filters, which monitor data transactions, may be used to ensure cache coherency.
Cache line based snoop filters in general are ‘fine grain’ (maintaining one bit for each source in a presence vector) or ‘coarse grain’ (each bit tracks more than one or many sources). Fine grain snoop filters require more storage and can be expensive as a system grows, while coarse grain snoop filters can lead to an increased amount of snooping. Designs either adopt fine grain or coarse grain based on the system need.
With coarse grain snoop filters there is never a directed snoop to exactly one source as the presence bit always indicates more than one source. This can lead to over snooping always for cases where there is a unique owner of a cache line.